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1. general description the uja1163 is a mini high-speed can sy stem basis chip (sbc) containing an iso 11898-2/5 compliant hs-can transceiver and an integrated 5 v/100 ma supply for a microcontroller. the uja1163 can be operated in a very low-current standby mode with bus wake-up capability and supports iso 11898-6 compliant aut onomous can biasing. 2. features and benefits 2.1 general ? iso 11898-2 and iso 11898-5 compliant high-speed can transceiver ? autonomous bus biasing according to iso 11898-6 ? fully integrated 5 v/100 ma low-drop voltage regulator for 5 v microcontroller supply (v1) ? bus connections are truly floating when power to pin bat is off 2.2 designed for automotive applications ? ? 8 kv electrostatic discharge (esd) protection, according to the human body model (hbm) on the can bus pins ? ? 6 kv esd protection, according to iec 61000-4-2 on the can bus pins and on pin bat ? can bus pins short-circuit proof to ? 58 v ? battery and can bus pins protected against automotive transients according to iso 7637-3 ? very low quiescent curr ent in standby mode wit h full wake-up capability ? leadless hvson14 package (3.0 mm ? 4.5 mm) with improved automated optical inspection (aoi) capability and low thermal resistance ? dark green product (halogen free and rest riction of hazardous substances (rohs) compliant) 2.3 low-drop voltage regulator for 5 v microcontroller supply (v1) ? 5 v nominal output; ? 2 % accuracy ? 100 ma output cu rrent capability ? current limiting above 150 ma ? on-resistance of 5 ? (max) ? support for microcontroller ram retention down to a battery voltage of 2 v ? undervoltage reset at 90 % of nominal value ? excellent transient response with a 4.7 ? f ceramic output capacitor uja1163 mini high-speed can system ba sis chip with standby mode rev. 1 ? 1 october 2013 product data sheet
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 2 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode ? short-circuit to gnd/overload protection on pin v1 2.4 power management ? standby mode featuring very low supply current; voltage v1 remains active to maintain the supply to the microcontroller ? remote wake-up capability via standard can wake-up pattern 2.5 system control and diagnostic features ? mode control via pin stbn ? overtemperature shutdown ? bidirectional reset pin 3. ordering information 4. block diagram table 1. ordering information type number package name description version UJA1163TK hvson14 plastic thermal enhanced very thin small outline package; no leads; 14 terminals; body 3 ? 4.5 ? 0.85 mm sot1086-2 fig 1. block diagram of uja1163 8-$ +6&$1 &$1+ &$1/ 7;' 5;' 90,&52&21752//(56833/<9 5671 9 %$7 ddd *1' 67%1 02'(&21752/ &$175$160,77(567$786 &76
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 3 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 5. pinning information 5.1 pinning 5.2 pin description [1] hvson14 package die supply grou nd is connected to both the gnd pi n and the exposed center pad. the gnd pin must be soldered to board ground. for enhanc ed thermal and electrical performance, it is recommended that the exposed center pad also be soldered to board ground. fig 2. pin configuration diagram terminal 1 index area 015aaa294 uja1163 txd 1 gnd 2 3 rxd 4 5 cts 6 i.c. stbn canh canl i.c. bat i.c. i.c. 7 14 13 12 11 10 9 8 transparent top view v1 rstn table 2. pin description symbol pin description txd 1 transmit data input gnd 2 [1] ground v1 3 5 v microcontroller supply voltage rxd 4 receive data output; reads out data from the bus lines rstn 5 reset input/output cts 6 can transmitter status i.c. 7 internally connected; should be left floating or connected to gnd i.c. 8 internally connected; should be left floating or connected to gnd i.c. 9 internally connected; should be left floating or connected to gnd bat 10 battery supply voltage i.c. 11 internally connected; should be left floating or connected to gnd canl 12 low-level can bus line canh 13 high-level can bus line stbn 14 standby control input (active low)
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 4 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 6. functional description 6.1 system controller the system controller controls the internal functions of the uja1163. 6.1.1 operating modes the system controller contains a state mach ine that supports five operating modes: normal, standby, reset, overtemp and off. the state transition s are illustrated in figure 3 . 6.1.1.1 normal mode normal mode is the active operating mode. in this mode, all the hardware on the device is available and can be activated (see ta b l e 3 ). voltage regulator v1 is enabled to supply the microcontroller. the can interface can be configured to be active and thus to support normal can communication. normal mode can be selected from standby mode by setting pin stbn high. pending wake-up events (power-on, can bus wake-up) are cleared when the uja1163 enters normal mode. 6.1.1.2 standby mode standby mode is the uja1163?s power saving mode, offering reduced current consumption. the transceiver is unable to transmit or receive data in standby mode. v1 remains active in standby mode. the receiver monitors bus activity for a wake -up request. the bus pi ns are biased to gnd (via r i(cm) ) when the bus is inactive for t > t to(silence) and at approximately 2.5 v when there is activity on the bus (autonomous biasing). pin rxd is forced low when a wake-up event is detected on the can bus. the uja1163 switches to standby mode via reset mode: ? from off mode if the battery voltage rise s above the power-on detection threshold (v th(det)pon ) ? from overtemp mode if the chip temperature falls below the overtemperature protection release threshold, t th(rel)otp standby mode can also be selected from normal by setting pin stbn low.
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 5 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 6.1.1.3 reset mode reset mode is the reset execution state of the sbc. this mode ensures that pin rstn is pulled down for a defined time to allow the microcontroller to start up in a controlled manner. the transceiver is unable to transmit or receive data in reset mode. v1 and overtemperature detection are active. the uja1163 switches to reset mode from any mode in response to a reset event. the uja1163 exits reset mode: ? and switches to standby mode if pin rstn is released high ? if the sbc is forced into off or overtemp mode if a v1 undervoltage event forced the transit ion to reset mo de, the uja1163 will remain in reset mode until the voltage on pin v1 has recovered. fig 3. uja1163 system controller state diagram standby normal stbn = low 015aaa295 no overtemperature overtemp rstn = high overtemperature event from any mode except off reset power-on off from any mode v bat undervoltage v1 undervoltage any reset event stbn = high
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 6 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 6.1.1.4 off mode the uja1163 switches to off mode when the ba ttery is first connected or from any mode when v bat < v th(det)poff . only power-on detection is enabled; all other modules are inactive. the uja1163 starts to boot up when the battery voltage rises above the power-on detection threshold v th(det)pon (triggering an initializat ion process) and switches to reset mode after t startup . pin rxd is driven low when the uja1163 switches from off mode to standby mode, to indicate a power-on event has occurred. in off mode, the can pins disengage from the bus (zero load; high-ohmic). 6.1.1.5 overtemp mode overtemp mode is provided to prevent the uja1163 being damaged by excessive temperatures. the uja1163 switches immedi ately to overtemp mode from any mode (other than off mode) when the global chip temperature rises above the overtemperature protection activation threshold, t th(act)otp . in overtemp mode, the can transmitter and receiver are disabled and the can pins are in a high-ohmic state. no wake-up event will be detected, but a pending wake-up will still be signalled by a low level on pin rxd, which will persist after the overtemperature event has been cleared. v1 is off and pin rstn is driven low. the uja1163 exits overtemp mode: ? and switches to reset mode if the chip temperature falls below the overtemperature protection release threshold, t th(rel)otp ? if the device is forced to switch to off mode (v bat < v th(det)poff ) 6.1.1.6 hardware characterization for the uja1163 operating modes [1] when the sbc switches from reset, standby or normal mode to of f mode, v1 behaves as a current source during power down while v bat is between 3 v and 2v. 6.1.2 mode control via pin stbn the uja1163 can be switched between normal and standby modes via the stbn control input (see figure 3 ). when stbn goes low, the uj a1163 switches to standby mode. when stbn goes high, the uja1163 switches to normal mode. 6.2 system reset when a system reset occurs, the sbc switch es to reset mode and initiates a process that generates a low-le vel pulse on pin rstn. table 3. hardware characterization by functional block block operating mode off standby normal reset overtemp v1 off [1] on on on off rstn low high high low low can floating offline active offline floating rxd v 1 level v1 level/low if wake-up detected can bit stream v1 level/low if wake-up detected v1 level/low if wake-up detected
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 7 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 6.2.1 characteristics of pin rstn pin rstn is a bidirectional open drain low side driver with integrated pull-up resistance, as shown in figure 4 . with this configuration, the sbc can detect the pin being pulled down externally, e.g. by the microcon troller. a filter, with filter time t fltr(rst) , prevents a reset being triggered by noise etc. 6.2.2 reset pulse the sbc distinguishes between a cold start and a warm start. a cold start is performed on start-up if the reset event was generated by a v1 undervoltage event. the cold start reset pulse width (t w(rst) ) is between 20 ms and 25 ms. if the reset event was not triggered by a v1 undervoltage (e.g by a warm start of the microcontroller), the reset pulse is between 1 ms and 1.5 ms. 6.2.3 reset sources the following events will cause the uja1 163 to switch to reset mode: ? v v1 drops below the 90 % undervoltage threshold ? pin rstn is pulled down externally ? the sbc leaves off mode ? the sbc leaves overtemp mode 6.3 global temperature protection the temperature of the uja1163 is monitored continuously, except in off mode. the sbc switches to overtemp mode if the temperat ure exceeds the overte mperature protection activation threshold, t th(act)otp . in addition, pin rstn is driven low and v1 and the can transceiver are switched off. when the temperature drops below the overtemperature protection release threshold, t th(rel)otp , the sbc switches to standby mode via reset mode. fig 4. rstn internal pin configuration rstn v1 015aaa276
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 8 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 6.4 power supplies 6.4.1 battery supply voltage (v bat ) the internal circuitry is supplied from the battery via pin bat. the device needs to be protected against negative supply voltages, e. g. by using an external series diode. if v bat falls below the power-off detection threshold, v th(det)poff , the sbc switches to off mode. however, the microcontroller supply voltage (v1) remains active until v bat falls below 2 v. the sbc switches from off mode to reset mode t startup after the battery voltage rises above the power-on detection threshold, v th(det)pon . a power-on event is indicated by a low level on pin rxd. rxd remains low fr om the moment uja1163 exits off mode until it switches to normal mode. 6.4.2 low-drop voltage supply for 5 v microcontroller (v1) v1 is intended to supply the microcontroller and the internal can transceiver and delivers up to 150 ma at 5 v. the output voltage on v1 is monitored. a system reset is generated if the voltage on v1 drops below the 90 % undervoltage threshold (90 % of the nominal v1 output voltage). the internal can transceiver consumes 50 ma (max) when the bus is continuously dominant, leaving 100 ma available for the extern al load on pin v1. in practice, the typical current consumption of the can transceiver is lower ( ? 25 ma), depending on the application, leaving more current available for the load. 6.5 high-speed can transceiver the integrated high-speed can transceiver is designed for bit rates up to 1 mbit/s, providing differential transmit and receive capability to a can protocol controller. the transceiver is iso 11898-2 and iso 11898-5 compliant. the can transmitter is supplied from v1. the can transceiver supports autonomous can biasing as defined in iso 11898-6, which helps to minimize rf emissions. canh and canl are always biased to 2.5 v when the uja1163 is in normal mode. autonomous bi asing is active when the uja1163 is in standby mode and the can transceiver is in can of fline mode - to 2.5 v if there is activity on the bus (can offline bias mode) and to gnd if there is no activity on the bus for t > t to(silence) (can offline mode). this is useful when the node is disabled due to a malfunction in the microcontroller. the sbc ensures that the can bus is correctly biased to avoid disturbing ongoing communication between other nodes. the au tonomous can bias voltage is derived directly from v bat . 6.5.1 can operating modes the integrated can transceiver supports three operating modes: active, offline and offline bias (see figure 6 ). the can transceiver operating mode depends on the uja1163 operating mode and the output voltage on v1.
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 9 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 6.5.1.1 can active mode in can active mode, the transceiver can transmit and receive data via canh and canl. the differential receiver converts the analog data on the bus lines into digital data, which is output on pin rxd. the transmitter conv erts digital data generated by the can controller (input on pin txd) into analog signals suitable for transmission over the canh and canl bus lines. the can transceiver is in active mode when: ? the uja1163 is in normal mode (stbn = 1) and ? the voltage on pin v1 is above the 90 % threshold in can active mode, the can bias voltage is derived from v1. if v1 falls below the 90 % threshold, the uja1163 exits can active mo de and enters can offline bias mode with autonomous can voltage biasing via pin bat. if pin txd is low when the transceiver swit ches to can active mode (uja1163 in normal mode), the transmitter and receiver will remain disabled until txd goes high. this prevents network traffic being blocked for t to(dom)txd (i.e. while the txd dominant time-out timer is running; see section 6.7.1 ) every time the transceiver enters active mode, if the txd pin is clamped permanently low. 6.5.1.2 can offline and offline bias modes in can offline mode, the transceiver monitors the can bus for a wake-up event. canh and canl are biased to gnd. can offline bias mode is the same as can offline mode, with the exception that the can bus is biased to 2.5 v. this mode is activa ted automatically when activity is detected on the can bus while the transceiver is in can offline mode. the tran sceiver will return to can offline mode if the can bus is silent (no can bus edges) for longer than t to(silence) . the can transceiver will switch from can ac tive mode to can offline bias mode if: ? the sbc switches to reset or standby mode or ? v v1 < 90 % of its nominal value the can transceiver will switch to can offline mode: ? from can offline bias mode if no activity is detected on the bus (no can edges) for t> t to(silence) or ? when the sbc switches from off or overtemp mode to reset mode the can transceiver switches from can off line mode to can offline bias mode if: ? a wake-up event is detected on the can bus or ? the sbc switches to normal mode while v v1 <90 % 6.5.1.3 can off the can transceiver is switched off comple tely with the bus lines floating when: ? the sbc switches to of f or overtemp mode or ? v bat falls below the can receiver undervoltage detection threshold, v uvd(can)
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 10 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode it will be switched on again on ente ring can offline mode when v bat rises above the undervoltage release threshold and the sbc is no longer in off/overtemp mode. 6.5.2 can standard wake-up the uja1163 monitors the bus for a wake-up pattern when the can transceiver is in offline mode. a filter at the receiver input prevents unwanted wake-up events occurring due to automotive transients or emi. a dominant-recessive-dominant wake-up pattern must be transmitted on the can bus within the wake-up timeout time (t to(wake) ) to pass the wake-up filter and trigger a wake-up event (see figure 5 ; note that additional pulses may occur between the recessive/dominant phases). the recessive and dominant phases must last at least t wake(busrec) and t wake(busdom) , respectively. pin rxd is driven low when a valid can wake-up pattern is detected on the bus. fig 5. can wake-up timing t dom t wake(busdom) recessive t rec t wake(busrec) t dom t wake(busdom) dominant dominant 015aaa267 t wake < t to(wake) can wake-up
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 11 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 6.6 can transmit status pin (cts) pin cts is driven high to indicate to the mi crocontroller that the transmitter is fully enabled and data can be tr ansmitted via the txd pin. pin cts is actively driven low: ? while the transmitter is starti ng up (e.g. during a transition from standby to normal) or ? if pin txd is clamped low for t > t to(dom)txd or ? if an undervoltage is detected on v1 (1) to prevent the bus lines being driven to a permanent dominant stat e, the transceiver will not switch to can active mode if p in txd is held low (e.g. by a short-circuit to gnd) fig 6. can transceiver state machine &$1$fwlyh ddd wudqvplwwhurii uhfhlyhurii 5;'zdnhxs+,*+ &$1+&$1/whuplqdwhg wr9iurp9 %$7 &$12iiolqh%ldv wudqvplwwhurii uhfhlyhurii 5;'zdnhxs+,*+ &$1+&$1/whuplqdwhg wr*1' &$12iiolqh wudqvplwwhurii uhfhlyhurii 5;'zdnhxs+,*+ &$1+&$1/iordwlqj &$12ii ohdylqj 2ii2yhuwhps iurpdooprghv >ww vlohqfh uhvhw256wdqge\@25 9 9 w!w vlohqfh uhvhw256wdqge\ 1rupdo 9 9 ! zdnhxs25 1rupdo 9 9 wudqvplwwhurq uhfhlyhurq 5;'elwvwuhdp &$1+&$1/whuplqdwhg wr99 w!w vlohqfh uhvhw256wdqge\ 1rupdo 9 9 ! 2ii25 2yhuwhps 25 9 %$7 9 xyg&$1
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 12 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 6.7 can fail-safe features 6.7.1 txd dominant timeout a txd dominant time-out timer is starte d when pin txd is forced low while the transceiver is in can active mode. if the lo w state on pin txd persists for longer than the txd dominant time-out time (t to(dom)txd ), the transmitter is disabled, releasing the bus lines to recessive state. this function prev ents a hardware and/or software application failure from driving the bus lines to a permanent dominant state (blocking all network communications). the txd dominant time-out timer is reset when pin txd goes high. the txd dominant time-out time also defines the minimum possible bit rate of 15 kbit/s. 6.7.2 pull-up on txd pin pin txd has an internal pull-up towards v1 to ensure a safe defined recessive driver state in case the pin is left floating. 6.7.3 pull-down on stbn pin pin stbn has an internal pull-down (to gnd) to ensure the uja1163 switches to standby mode if stbn is left floating. 6.7.4 loss of power at pin bat a loss of power at pin bat has no influence on the bus lines or on the microcontroller. no reverse currents will flow from the bus.
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 13 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 7. limiting values [1] when the device is not powered up, i v1 (max) = 25 ma. [2] verified by an external test house to ensure pins can withst and iso 7637 part 2 automotive transient test pulses 1, 2a, 3a a nd 3b. [3] esd performance according to iec 61000-4-2 (150 pf, 330 ? ) has been verified by an external test house; the result was equal to or better than ? 6 kv. [4] human body model (hbm): according to aec-q100-002 (100 pf, 1.5 k ? ). [5] v1 and bat connected to gnd, em ulating the application circuit. [6] machine model (mm): according to aec-q100-003 (200 pf, 0.75 ? h, 10 ? ). [7] charged device model (cdm): according to aec-q100-011 (field induced charge; 4 pf). [8] in accordance with iec 60747-1. an alternative def inition of virtual junction temperature is: t vj =t amb +p ? r th(j-a) , where r th(j-a) is a fixed value used in the calculation of t vj . the rating for t vj limits the allowable combinations of power dissipation (p) and ambient temperature (t amb ). table 4. limiting values in accordance with the absolute ma ximum rating system (iec 60134). symbol parameter conditions min max unit v x voltage on pin x dc value pin v1 [1] ? 0.2 +6 v pins txd, rxd, stbn, rstn ? 0.2 v v1 +0.2 v pin bat ? 0.2 +40 v pins canh and canl with respect to any other pin ? 58 +58 v v (canh-canl) voltage between pin canh and pin canl ? 40 +40 v v trt transient voltage on pins bat: via reverse polarity diode and capacitor to ground canl, canh: coupling via 1 nf capacitors [2] ? 150 +100 v v esd electrostatic discharge voltage iec 61000-4-2 [3] on pins canh and canl; pin bat with capacitor ? 6+6 kv hbm [4] on pins canh, canl [5] ? 8+8 kv on pins bat ? 4+4 kv on any other pin ? 2+2 kv mm [6] on any pin ? 100 +100 v cdm [7] on corner pins ? 750 +750 v on any other pin ? 500 +500 v t vj virtual junction temperature [8] ? 40 +150 ?c t stg storage temperature ? 55 +150 ?c
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 14 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 8. thermal characteristics [1] according to jedec jesd51-2, jesd51-5 and jesd51-7 at natu ral convection on 2s2p board. board with two inner copper layers (thickness: 35 ? m) and thermal via array under the exposed pad connect ed to the first inner copper layer (thickness: 70 ? m). 9. static characteristics table 5. thermal characteristics symbol parameter conditions typ unit r th(vj-a) thermal resistance from virtual junction to ambient [1] 60 k/w table 6. static characteristics t vj = ? 40 ? c to +150 ? c; v bat = 3 v to 28 v; r (canh-canl) =60 ? ; all voltages are defined with respect to ground; positive currents flow into the ic; ty pical values are given at v bat = 13 v; unless otherwise specified. symbol parameter conditions min typ max unit supply; pin bat v th(det)pon power-on detection threshold voltage v bat rising 4.2 - 4.55 v v th(det)poff power-off detection threshold voltage v bat falling 2.8 - 3 v v uvr(can) can undervoltage recovery voltage v bat rising 4.5 - 5 v v uvd(can) can undervoltage detection voltage v bat falling 4.2 - 4.55 v i bat battery supply current standby mode; i v1 = 0 ? a; ? 40 ? c < t vj <85 ?c; v bat = 7 v to 18 v -6085 ? a normal mode; can active mode; can recessive; v txd =v v1 -47.5ma normal mode; can active mode; can dominant; v txd =0 v -4667ma voltage source: pin v1 v o output voltage v bat = 5.5 v to 18 v; i v1 = ? 120 ma to 0 ma; v txd =v v1 4.9 5 5.1 v v bat = 5.65 v to 18 v; i v1 = ? 150 ma to 0 ma; v txd =v v1 4.9 5 5.1 v v bat = 5.65 v to 18 v; i v1 = ? 100 ma to 0 ma; v txd =0 v; v canh = 0 v 4.9 5 5.1 v ? v ret(ram) ram retention voltage difference v bat = 2 v to 3 v; i v1 = ? 2 ma - - 100 mv v bat = 2 v to 3 v; i v1 = ? 200 ? a 10 mv r (bat-v1) resistance between pin bat and pin v1 v bat = 4 v to 6 v; i v1 = ? 120 ma; t vj < 150 ?c --5 ? v bat = 3 v to 4 v; i v1 = ? 40 ma - 2.625 - ?
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 15 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode v uvd undervoltage detection voltage v uvd(nom) = 90 % 4.5 - 4.75 v v uvr undervoltage recovery voltage 4.5 - 4.75 v i o(sc) short-circuit output current ? 300 - ? 150 ma standby mode control input; pin stbn v th(sw) switching threshold voltage 0.25v v1 -0.75v v1 v r pd pull-down resistance 40 60 80 k ? can transmit data input; pin txd v th(sw) switching threshold voltage 0.25v v1 -0.75v v1 v r pu pull-up resistance 40 60 80 k ? can transmitter status; pin cts i oh high-level output current v cts =v v1 ? 0.4 v; transmitter on -- ? 4ma i ol low-level output current v cts =0.4v; transmitter off 4-- ma can receive data output; pin rxd v oh high-level output voltage i oh = ? 4ma v v1 ? 0.4 - - v v ol low-level output voltage i ol = 4 ma - - 0.4 v r pu pull-up resistance can offline mode 40 60 80 k ? high-speed can bus lines; pins canh and canl v o(dom) dominant output voltage can active mode; v v1 = 4.5 v to 5.5 v; v txd = 0 v; pin canh 2.75 3.5 4.5 v pin canl 0.5 1.5 2.25 v v txsym transmitter voltage symmetry v txsym = v canh +v canl ; f txd = 250 khz; c split =4.7nf [1] [2] 0.9v v1 -1.1v v1 v v dom(tx)sym transmitter dominant voltage symmetry v dom(tx)sym = v v1 ? v canh ? v canl ; v v1 =5 v ? 400 - +400 mv v o(dif)bus bus differential output voltage can active mode (dominant); v txd = 0 v; v v1 = 4.75 v to 5.5 v; r (canh-canl) =45 ? to 65 ? 1.5 - 3.0 v can active mode (recessive); can offline mode; v txd = v v1 ; t vj <150 ?c; r (canh-canl) = no load ? 50 - +50 mv v o(rec) recessive output voltage can active mode; v txd = v v1 r (canh-canl) = no load 20.5v v1 3v can offline mode; r (canh-canl) = no load ? 0.1 - +0.1 v can offline bias mode; r (canh-canl) = no load; v v1 = 0 v 22.53 v table 6. static characteristics ?continued t vj = ? 40 ? c to +150 ? c; v bat = 3 v to 28 v; r (canh-canl) =60 ? ; all voltages are defined with respect to ground; positive currents flow into the ic; ty pical values are given at v bat = 13 v; unless otherwise specified. symbol parameter conditions min typ max unit
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 16 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode [1] not tested in production; guaranteed by design. [2] the test circuit used to measure the bus output voltage symmetry (which includes c split ) is shown in figure 10 . i o(dom) dominant output current can active mode; v txd =0v; v v1 =5 v pin canh; v canh =0v ? 50 - - ma pin canl; v canl =5v - - 52 ma i o(rec) recessive output current v canl = v canh = ? 27 v to +32 v; v txd = v v1 ? 3-+3 ma v th(rx)dif differential receiver threshold voltage can active mode; v canl = v canh = ? 12 v to +12 v 0.5 0.7 0.9 v can offline mode; v canl = v canh = ? 12 v to +12 v 0.4 0.7 1.15 v v hys(rx)dif differential receiver hysteresis voltage can active mode; v canl = v canh = ? 12 v to +12 v 50 200 400 mv r i(cm) common-mode input resistance 9 15 28 k ? ? r i input resistance deviation ? 1-+1 % r i(dif) differential input resistance v canl = v canh = ? 12 v to +12 v 19 30 52 k ? c i(cm) common-mode input capacitance [1] --20pf c i(dif) differential input capacitance [1] --10pf i li input leakage current v bat = v v1 =0v or v bat = v v1 = shorted to ground via 47 k ? ; v canh = v canl =5v ? 5-+5 ? a temperature protection t th(act)otp overtemperature protection activation threshold temperature 167 177 187 ?c t th(rel)otp overtemperature protection release threshold temperature 127 137 147 ?c reset output; pin rstn v ol low-level output voltage v v1 = 1.0 v to 5.5 v; pull-up resistor to v v1 ? 900 ? 0 - 0.2v v1 v r pu pull-up resistance 40 60 80 k ? v th(sw) switching threshold voltage 0.25v v1 -0.75v v1 v table 6. static characteristics ?continued t vj = ? 40 ? c to +150 ? c; v bat = 3 v to 28 v; r (canh-canl) =60 ? ; all voltages are defined with respect to ground; positive currents flow into the ic; ty pical values are given at v bat = 13 v; unless otherwise specified. symbol parameter conditions min typ max unit
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 17 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 10. dynamic characteristics table 7. dynamic characteristics t vj = ? 40 ? c to +150 ? c; v bat = 3 v to 28 v; r (canh-canl) = 60 ? ; all voltages are defined with respect to ground; positive currents flow into the ic; ty pical values are given at v bat = 13 v; unless otherwise specified. symbol parameter conditions min typ max unit voltage source; pin v1 t startup start-up time from v bat exceeding the power-on detection threshold until v v1 exceeds the 90 % undervoltage threshold -2.84.7ms t d(uvd) undervoltage detection delay time 6 - 39 ? s t d(uvd-rstnl) delay time from undervoltage detection to rstn low undervoltage on v1 - - 48 ? s can transceiver timi ng; pins canh, canl, txd and rxd t d(txd-rxd) delay time from txd to rxd 50 % v txd to 50 % v rxd ; c rxd = 15 pf; f txd = 250 khz --255ns t d(txd-busdom) delay time from txd to bus dominant -80-ns t d(txd-busrec) delay time from txd to bus recessive -80-ns t d(busdom-rxd) delay time from bus dominant to rxd c rxd = 15 pf - 105 - ns t d(busrec-rxd) delay time from bus recessive to rxd c rxd = 15 pf - 120 - ns t wake(busdom) bus dominant wake-up time first pulse (after first recessive) for wake-up on pins canh and canl; can offline mode 0.5 - 3.0 ? s second pulse for wake-up on pins canh and canl 0.5 - 3.0 ? s t wake(busrec) bus recessive wake-up time first pulse for wake-up on pins canh and canl; can offline mode 0.5 - 3.0 ? s second pulse (after first dominant) for wake-up on pins canh and canl 0.5 - 3.0 ? s t to(wake) wake-up time-out time between first and second dominant pulses; can offline mode 570 - 850 ? s t to(dom)txd txd dominant time-out time can active mode; v txd = 0 v 2.7 - 3.3 ms t to(silence) bus silence time-out time recessive time measurement started in all can modes; r l = 120 ? 0.95 - 1.17 s t d(busact-bias) delay time from bus active to bias - - 200 ? s t startup(can) can start-up time when switching to active mode (cts = 1) --220 ? s
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 18 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode pin rstn: reset pulse width t w(rst) reset pulse width cold start 20 - 25 ms warm start 1 - 1.5 ms t fltr(rst) reset filter time 7 - 18 ? s table 7. dynamic characteristics ?continued t vj = ? 40 ? c to +150 ? c; v bat = 3 v to 28 v; r (canh-canl) = 60 ? ; all voltages are defined with respect to ground; positive currents flow into the ic; ty pical values are given at v bat = 13 v; unless otherwise specified. symbol parameter conditions min typ max unit fig 7. can transceiver timing diagram &$ 1+ &$ 1/ w g7;'exvgrp 7; ' 9 2gliexv 5; ' +,*+ +,* + /2: /2: grp lqdqw uhfh vvlyh 9 9 w gexvgrp5;' w g7;'exvuhf w gexvuhf5;' w g7;'5;' w g7;'5;' ddd
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 19 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 11. application information 11.1 application diagram (1) actual capacitance value must be a least 1.76 ? f with 5 v dc offset (recommended capacitor value is 4.7 ? f) (2) for bus line end nodes, r t = 60 ? in order to support the ?split terminat ion concept?. for sub- nodes, an optional ?weak? termination of e.g. r t = 1.3 k ? can be used, if required by the oem. fig 8. typical application using the uja1163 cts aaa-008446 rstn uja1163 3 gnd 5 rstn micro- controller 6 rxd rxd 4 txd txd 1 standard c port v cc v 1 2 bat 10 bat v ss stbn 14 22 f (1) 12 13 canh canl e.g. 4.7 nf r t (2) r t (2)
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 20 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 12. test information 12.1 quality information this product has been qualified in accordance with the automotive electronics council (aec) standard q100 - failure mechanism based stress test qualification for integrated circuits , and is suitable for use in automotive applications. fig 9. timing test circuit for can transceiver fig 10. test circuit for measuring transceiver driver symmetry sbc bat canl canh txd r l rxd 15 pf gnd 100 pf 015aaa369 015aaa444 canh 13 10 12 canl sbc 4.7 nf 30 30 txd rxd gnd 1 4 bat 2 f = 250 khz c split
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 21 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 13. package outline fig 11. package outline sot1086-2 (hvson14) references outline version european projection issue date iec jedec jeita sot1086-2 - - - mo-229 - - - sot1086-2 10-07-14 10-07-15 unit mm max nom min 1.00 0.85 0.80 0.05 0.03 0.00 0.2 4.6 4.5 4.4 4.25 4.20 4.15 3.1 3.0 2.9 0.65 3.9 0.45 0.40 0.35 0.1 a dimensions hvson14: plastic, thermal enhanced very thin small outline package; no leads; 14 terminals; body 3 x 4.5 x 0.85 mm sot1086-2 a 1 b 0.35 0.32 0.29 cdd h ee h 1.65 1.60 1.55 ee 1 k 0.35 0.30 0.25 lv 0.1 w 0.05 y 0.05 y 1 0 2.5 5 mm scale b a terminal 1 index area d e x detail x a c a 1 c y c y 1 ac b v c w b terminal 1 index area e 1 e d h e h l k 1 14 7 8
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 22 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 14. handling information all input and output pins are protected ag ainst electrostatic discharge (esd) under normal handling. when handling ensure that the appropriate precautions are taken as described in jesd625-a or equivalent standards. 15. soldering of smd packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 ?surface mount reflow soldering description? . 15.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electr ical circuits. the soldered joint provides both the mechanical and the electrical connection. th ere is no single sold ering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for fine pitch smds. reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 15.2 wave and reflow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased pr obability of bridging. the reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. leaded packages, packages with solder balls, and leadless packages are all reflow solderable. key characteristics in both wave and reflow soldering are: ? board specifications, in cluding the board finish , solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivit y level of the packages ? package placement ? inspection and repair ? lead-free soldering versus snpb soldering 15.3 wave soldering key characteristics in wave soldering are:
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 23 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode ? process issues, such as application of adhe sive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath specifications, including temperature and impurities 15.4 reflow soldering key characteristics in reflow soldering are: ? lead-free versus snpb solderi ng; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see figure 12 ) than a snpb process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? reflow temperature profile; this profile includ es preheat, reflow (in which the board is heated to the peak temperature) and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classified in accordance with ta b l e 8 and 9 moisture sensitivity precautions, as indicat ed on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during reflow soldering, see figure 12 . table 8. snpb eutectic process (from j-std-020d) package thickness (mm) package reflow temperature ( ?c) volume (mm 3 ) < 350 ? 350 < 2.5 235 220 ? 2.5 220 220 table 9. lead-free process (from j-std-020d) package thickness (mm) package reflow temperature ( ?c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 24 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode for further information on temperature profiles, refer to application note an10365 ?surface mount reflow soldering description? . 16. soldering of hvson packages section 15 contains a brief introduction to the te chniques most commonly used to solder surface mounted devices (smd). a more detailed discussion on soldering hvson leadless package ics can found in the following application notes: ? an10365 ?surface mount reflow soldering description? ? an10366 ?hvqfn application information? msl: moisture sensitivity level fig 12. temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 25 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 17. revision history table 10. revision history document id release date data sheet status change notice supersedes uja1163 v.1 20131001 product data sheet - -
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 26 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode 18. legal information 18.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 18.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 18.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qualified for use in automotive applications. unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors and its suppliers accept no liability for inclusion and/or use of nxp semiconducto rs products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
uja1163 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 1 october 2013 27 of 28 nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any licens e under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 18.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 19. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors uja1163 mini high-speed can system basis chip with standby mode ? nxp b.v. 2013. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 1 october 2013 document identifier: uja1163 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 20. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 2.1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.2 designed for automotive applications. . . . . . . . 1 2.3 low-drop voltage regulator for 5 v microcontroller supply (v1). . . . . . . . . . . . . 1 2.4 power management . . . . . . . . . . . . . . . . . . . . . 2 2.5 system control and diagnost ic features . . . . . . 2 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 functional description . . . . . . . . . . . . . . . . . . . 4 6.1 system controller . . . . . . . . . . . . . . . . . . . . . . . 4 6.1.1 operating modes . . . . . . . . . . . . . . . . . . . . . . . 4 6.1.1.1 normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.1.1.2 standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.1.1.3 reset mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.1.1.4 off mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6.1.1.5 overtemp mode . . . . . . . . . . . . . . . . . . . . . . . . 6 6.1.1.6 hardware characterization for the uja1163 operating modes . . . . . . . . . . . . . . . . . . . . . . . . 6 6.1.2 mode control via pin stbn . . . . . . . . . . . . . . . . 6 6.2 system reset. . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6.2.1 characteristics of pin rstn . . . . . . . . . . . . . . . 7 6.2.2 reset pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.2.3 reset sources. . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.3 global temperature protection . . . . . . . . . . . . . 7 6.4 power supplies . . . . . . . . . . . . . . . . . . . . . . . . . 8 6.4.1 battery supply voltage (v bat ) . . . . . . . . . . . . . . 8 6.4.2 low-drop voltage supply for 5 v microcontroller (v1) . . . . . . . . . . . . . . . . . . 8 6.5 high-speed can transceiver . . . . . . . . . . . . . . 8 6.5.1 can operating modes . . . . . . . . . . . . . . . . . . . 8 6.5.1.1 can active mode . . . . . . . . . . . . . . . . . . . . . . . 9 6.5.1.2 can offline and offline bias modes. . . . . . . . . 9 6.5.1.3 can off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.5.2 can standard wake-up. . . . . . . . . . . . . . . . . . 10 6.6 can transmit status pin (cts) . . . . . . . . . . . . 11 6.7 can fail-safe features . . . . . . . . . . . . . . . . . . 12 6.7.1 txd dominant timeout . . . . . . . . . . . . . . . . . . 12 6.7.2 pull-up on txd pin . . . . . . . . . . . . . . . . . . . . . 12 6.7.3 pull-down on stbn pin . . . . . . . . . . . . . . . . . 12 6.7.4 loss of power at pin bat . . . . . . . . . . . . . . . . 12 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 13 8 thermal characteristics . . . . . . . . . . . . . . . . . 14 9 static characteristics . . . . . . . . . . . . . . . . . . . 14 10 dynamic characteristics. . . . . . . . . . . . . . . . . 17 11 application information . . . . . . . . . . . . . . . . . 19 11.1 application diagram . . . . . . . . . . . . . . . . . . . . 19 12 test information . . . . . . . . . . . . . . . . . . . . . . . 20 12.1 quality information . . . . . . . . . . . . . . . . . . . . . 20 13 package outline. . . . . . . . . . . . . . . . . . . . . . . . 21 14 handling information . . . . . . . . . . . . . . . . . . . 22 15 soldering of smd packages . . . . . . . . . . . . . . 22 15.1 introduction to soldering. . . . . . . . . . . . . . . . . 22 15.2 wave and reflow soldering. . . . . . . . . . . . . . . 22 15.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . 22 15.4 reflow soldering . . . . . . . . . . . . . . . . . . . . . . 23 16 soldering of hvson packages . . . . . . . . . . . 24 17 revision history . . . . . . . . . . . . . . . . . . . . . . . 25 18 legal information . . . . . . . . . . . . . . . . . . . . . . 26 18.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 26 18.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 18.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 26 18.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 27 19 contact information . . . . . . . . . . . . . . . . . . . . 27 20 contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

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